AD9122
Categories:
DAC
+86 18926758761
Tel
Amy@junteli.com
Product Details
Product Uses and Application Scope
- Wireless Infrastructure: W-CDMA, GSM, CDMA2000, TD-SCDMA, WiMax, LTE
- Digital High/Low Intermediate Frequency Synthesis
- Internal digital upconversion function
- Transmit diversity
- Broadband Communications: LMDS, MMDS, Point-to-Point Communication
Product Features
- Dual-channel 16-bit D/A converter
- 1000 MSPS data conversion rate
- SFDR = 73 dB at f_out = 20 MHz (typical value)
- The innovative 2×, 4×, and 8× interpolators/coarse-tuning complex modulators can place the carrier at any position within the DAC’s bandwidth.
- High-performance, low-noise phase-locked loop clock multiplier
- Digital anti-sinc filter
- ESD≥500V
- Compatible with AD9122
Standard
- Detailed Specification: Q/GC XXXX-2022 “Detailed Specification for the Semiconductor Integrated Circuit AD9122-JTL, a 16-bit, 1 GSPS, Dual-Channel D/A Converter”
- Quality Grade: Industrial Grade
Product Description
The AD9122‑JTL is a dual‑channel, 16‑bit interpolating DAC—a digital intermediate‑frequency (TxDAC+) analog‑to‑digital converter featuring digital interpolation and digital‑domain in‑phase/quadrature (I/Q) modulation. In addition to conventional DAC functions, it incorporates data‑path digital signal‑processing capabilities such as digital interpolation and modulation, digital data reception and assembly, an SPI interface for configuration, clock‑reception division and PLL‑based clock multiplication, as well as four auxiliary DACs for channel gain and offset calibration.
The AD9122‑JTL features a maximum sampling rate of 1 GSPS. It includes a serial peripheral interface (SPI) for convenient configuration across various operating modes. Each data channel incorporates an independent, selectable interpolation filter, configurable for 1×, 2×, 4×, or 8× interpolation. The digital engine employs an innovative integrated filter architecture that combines an interpolation filter with a digital quadrature modulator, supporting digital quadrature modulation at f/2, f/4, −f/4, and f/8. Four auxiliary DACs enable programmable channel gain and distortion control. Additionally, the device offers programmable internal clock dividers and PLL frequency multipliers. The AD9122‑JTL is packaged in a 72‑pin quad flat no‑lead (QFN72) package with dimensions no larger than 10.10 mm × 10.10 mm × 1.1 mm. This circuit can serve as a functional replacement for the AD9122‑JTL.
Functional block diagram of the product:
Figure 1 Functional Block Diagram
Product outline dimension drawing and actual photos
Figure 2: Product Outline Dimensions and Actual Photographs
Related Products
Online inquiry
Note: Please leave your contact information and our professionals will contact you as soon as possible!
-
Our R&D team mainly consists of doctors and masters from the University of Electronic Science and Technology of China (UESTC) and Xidian University (XDU), with extensive practical and academic experience in the industry. The management team has more than 10 years of experience in industrial production and quality management.
Contact Us
> Service Hotline: +86 400-613-9133
> Tel: +86 18926758761
> Email: Amy@junteli.com
> Address: Room 205-207-213-305-307-309-311, Building 2, Comprehensive Building, No.110 Ziheng West Road, Jinsha Community, Kengzi Subdistrict, Pingshan District, Shenzhen City
copyright © 2026 Junteli Technology Group .Ltd.